Bengaluru (Karnataka) [India], February 7 (ANI): Union Minister for Electronics and IT Ashwini Vaishnaw on Saturday unveiled a high-tech 2-nanometre chip manufactured by Qualcomm.
On the event, the minister underscored the nation’s fast progress in constructing an end-to-end semiconductor ecosystem.
Talking on the occasion, Vaishnaw mentioned the event marks a shift from India’s earlier function as a back-office vacation spot to a hub for end-to-end semiconductor product improvement, from buyer product definition by means of silicon design, tape-out, and validation.
“Our nation is making main progress within the semiconductor manufacturing design and getting your complete ecosystem in our nation. It is a new business,” he mentioned.
Holding a chip wafer in his palms, the minister described its capabilities and the precision manufacturing concerned in it.
The minister famous that the newly designed wafer incorporates roughly 20 to 30 billion transistors, with every die–a small sq. on the wafer–housing almost 20 billion transistors. He defined that the chip integrates each a CPU and a GPU.
“The tip product which comes out of that is this type of module which comes out, which principally turns into an AI pc on the desktop of any individual on the sting, which implies inside a digital camera, inside a Wi-Fi router, or inside a tool on any machine or any transferring automobile, car, practice or aeroplane,” he mentioned.
He lauded the Indian semiconductor expertise developed below the Semicon mission.
Vaishnaw credited India’s rising expertise pipeline for reinforcing these technological developments. Beneath the Semicon India Mission 1.0, the federal government set a goal to coach 85,000 semiconductor professionals over a decade. By far, about 67,000 semiconductor engineers have been educated, he mentioned.
In line with the minister, semiconductor design training is now obtainable at 315 universities and schools nationwide, with college students getting access to superior digital design automation (EDA) instruments. These college students are designing chips, taping them out on the Semiconductor Laboratory in Mohali, and validating closing merchandise, a functionality which, based on Vaishnaw, is uncommon globally.
“Not many universities on the planet, not many international locations on the planet, have this type of mannequin,” the minister mentioned.
Trying forward, Vaishnaw mentioned the federal government will quickly roll out the Semicon India Mission 2.0, introduced within the Union Funds by Finance Minister Nirmala Sitharaman. The following section will prioritise semiconductor design, adopted by tools and supplies manufacturing, deeper expertise improvement for full system-level design, and the growth of fabrication and meeting, testing, marking, and packaging (ATMP) items.
He additionally mentioned India’s roadmap to advance from present 28-nanometre manufacturing capabilities to 7-nanometre know-how shall be a key focus below Semicon 2.0, with preparations anticipated to be accomplished within the coming months.
“We must always be capable to lastly full it throughout the subsequent few months,” the minister mentioned about Semicon 2.0, with out giving a definitive timeline. (ANI)
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